About Our Research

STARR-Lab conducts research into the effects of radiation and long-term operating conditions on modern electronic devices, integrated circuits, and systems. Our work combines semiconductor design, simulation, experimental testing, and system-level validation to better understand electronic failure mechanisms and develop more reliable technologies.

A central part of the lab’s mission is training highly qualified personnel. Graduate and undergraduate researchers gain hands-on experience in integrated-circuit design, embedded systems, radiation testing, custom instrumentation, data analysis, and experimental campaigns at radiation facilities in Canada and internationally.

About the Project

STARR-Lab researches circuit and system techniques that improve the reliability of electronics operating in radiation environments. This work includes radiation-hardened digital cells, memory systems, clock-generation circuits, analog and mixed-signal designs, and complete integrated systems implemented in advanced semiconductor technologies.

• Radiation-hardened flip-flops and standard cells
• SRAM protection and error correction
• PLLs, VCOs, and clock-generation systems
• Advanced CMOS, FinFET, and FDSOI technologies
• ASIC design and physical implementation

About The Project

STARR-Lab develops and applies experimental methods for studying radiation-induced failures in electronic devices. Experiments use gamma, alpha, proton, neutron, heavy-ion, and ultrafast pulsed-laser sources to characterize device behaviour and validate radiation-tolerant designs.

• Cobalt-60 irradiation
• Alpha-particle exposure
• Pulsed-laser fault injection
• Proton and neutron testing
• Heavy-ion campaigns
• Failure localization and sensitivity mapping

About The Project

STARR-Lab investigates how radiation and electronic faults affect processors, memories, FPGAs, and embedded systems. This work includes the design of fault-tolerant architectures, real-time monitoring systems, and research platforms for evaluating complete computing systems.

• RISC-V processors
• FPGA fault tolerance
• Error-correcting memory
• Embedded monitoring systems
• Fault injection
• Reliable computing architectures

A Radiation-Tolerant RISC-V Research Platform

StarRISC is a radiation-tolerant microcontroller developed by STARR-Lab to investigate how modern open-source processor architectures can be adapted for space and other high-reliability environments. Based on the OpenHW Foundation’s CORE-V-MCU platform, StarRISC combines a 32-bit CV32E40P RISC-V processor core with on-chip memory, communication peripherals, clock-generation circuitry, and dedicated radiation-monitoring features. The first StarRISC application-specific integrated circuit was fabricated using a 22-nm fully depleted silicon-on-insulator technology.

Rather than relying on processor-level replication, StarRISC applies radiation-hardening techniques throughout the device. Its 512 kB on-chip SRAM is protected using single-error-correcting, double-error-detecting error-correction codes and automatic memory scrubbing. Storage elements and critical buffers were replaced with custom radiation-hardened cells, while layout techniques were used to reduce charge sharing and improve resistance to single-event effects. Error-monitoring circuitry also allows memory upsets to be observed during irradiation experiments.

The device has been evaluated using alpha particles, protons, and broad-beam heavy ions, with results demonstrating strong resistance to radiation-induced errors. These experiments also showed that system-level reliability depends not only on the underlying hardware, but on the software and memory-access patterns running during irradiation. Follow-on testing using a focused heavy-ion microbeam allowed researchers to selectively irradiate the processor core, SRAM, peripheral circuitry, and phase-locked-loop clock generator to better understand where faults originate within a complete system-on-chip.

StarRISC provides a research platform through which students and collaborators can work across the full microelectronics-development process, including processor architecture, radiation-hardened circuit design, ASIC implementation, firmware, test-board development, and accelerator-based radiation testing.

Key Features

• 32-bit CV32E40P RISC-V processor core
• Fabricated in 22-nm FD-SOI technology
• 512 kB of ECC-protected on-chip SRAM
• Automatic memory correction and scrubbing
• Custom radiation-hardened storage cells and buffers
• Integrated single- and double-bit error monitoring
• UART, SPI, QSPI, I²C, GPIO, and JTAG interfaces
• Integrated phase-locked-loop clock generator
• Support for embedded software and real-time operating systems

Research Results

The design and experimental evaluation of StarRISC have been reported in two IEEE Transactions on Nuclear Science publications:

• Design and Testing of a 32-bit Radiation-Tolerant RISC-V Microcontroller at the 22-nm FD-SOI Node
• Microbeam Testing of an ASIC Radiation-Hardened 32-bit RISC-V Microcontroller

The first publication presents the architecture, radiation-hardening techniques, and broad-beam irradiation results. The second uses targeted heavy-ion microbeam testing to study the sensitivity of individual functional blocks within the device.

Continuing the StarRISC Program

Building on the 22-nm device, STARR-Lab is continuing the StarRISC research program in more advanced semiconductor technologies. Current work includes a 12-nm FinFET implementation incorporating embedded FPGA technology, enabling researchers to evaluate reconfigurable accelerators, custom logic, and mission-specific computing functions within a radiation-tolerant platform. This work is supported in part through GlobalFoundries’ University Research Program and collaboration with QuickLogic.