About The Project

Combining our knowledge and experience in developing rad-tolerant digital and analog circuits, StarRISC is a custom-designed microcontroller for use in space.

Built off the Core-V-MCU project from OpenHardware group, StarRISC features a 32-bit RISC-V core along with variety of peripheral circuitry. This makes StarRISC an optimal solution for edge-computing applications where high-reliability is a necessity.

Key Features:

• Fabricated on the 22nm FD SOI Technology Node
• I2C, UART, QSPI, GPIO Communications
• 512 kB ECC SRAM
• Internal SEU Counter
• Custom-Designed Robust Clocking System
• Custom-Design Rad-Hard Registers
• FreeRTOS Support

Timeline:

StarRISC has been submitted for fabrication, and testing is expected to begin in early 2024. As well, StarRISC is sleighted to be placed as a payload onboard the next-generation Cubesat by the University of Saskatchewan Space Design Team

About The Project

STARR-Lab has been researching and designing radiation-tolerant digital circuits for a number of years. With each new technology node, designers of digital systems need to be wear of the most efficient design practices that can help improve the reliability of their storage latches.

STARR-Lab has helped to achieve this by researching and exploring new radiation-hardening practices at the 65-nm, 28-nm, 22-nm, and 12-nm nodes. Our custom-designed test-chips and extensive device simulations provide valuable information for the radiation-effects community.

Notable Works:

• 65-nm ECC SRAM designs
• Hardened SRAM storage cells
• 22-nm FD SOI Hardened Flip-Flops
• 12-nm FinFET Hardened Flip-Flops
• Internal Rad-tolerant Error Monitoring

About The Project

STARR-Lab has been working on the design of radiation-tolerant high performance analog circuits for several years. Our scope is to provide high performance and robust analog circuits in some modern technologies

STARR-Lab has explored new radiation-hardening techniques at, 28-nm, 22-nm. Our custom-designed test-chips have gone through extensive device verification process at both functional and radiation performance level using simulations, functional testing and radiation experiments to test the efficiency of our work and ensure reliability.

Notable Works:

• 28-nm Radiation hardened Multi-loop VCO
• 28-nm Radiation hardened PLL
• 28-nm Radiation Hardened PVT insensitive Bandgap Reference
• 22-nm Radiation hardened Multi-loop VCO
• 22-nm Radiation hardened PLL